// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM4K.hdl

/**
 * Memory of 4K registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM4K {
    IN in[16], load, address[12];
    OUT out[16];

    PARTS:
    // Put your code here:
    DMux8Way(in=load, sel[0..2]=address[9..11], a=load0, b=load1, c=load2, d=load3, e=load4, f=load5, g=load6, h=load7);
    RAM512(in[0..15]=in[0..15], load=load0, address[0..8]=address[0..8], out[0..15]=out0);
    RAM512(in[0..15]=in[0..15], load=load1, address[0..8]=address[0..8], out[0..15]=out1);
    RAM512(in[0..15]=in[0..15], load=load2, address[0..8]=address[0..8], out[0..15]=out2);
    RAM512(in[0..15]=in[0..15], load=load3, address[0..8]=address[0..8], out[0..15]=out3);
    RAM512(in[0..15]=in[0..15], load=load4, address[0..8]=address[0..8], out[0..15]=out4);
    RAM512(in[0..15]=in[0..15], load=load5, address[0..8]=address[0..8], out[0..15]=out5);
    RAM512(in[0..15]=in[0..15], load=load6, address[0..8]=address[0..8], out[0..15]=out6);
    RAM512(in[0..15]=in[0..15], load=load7, address[0..8]=address[0..8], out[0..15]=out7);
    Mux8Way16(a[0..15]=out0, b[0..15]=out1, c[0..15]=out2, d[0..15]=out3, e[0..15]=out4, f[0..15]=out5, g[0..15]=out6, h[0..15]=out7, sel[0..2]=address[9..11], out[0..15]=out[0..15]);
}